340 lines
6.7 KiB
Plaintext
340 lines
6.7 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Copyright 2022 Toradex
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*/
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#include "imx8qm-apalis-v1.1.dtsi"
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/ {
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model = "Toradex Apalis iMX8QM";
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compatible = "toradex,apalis-imx8",
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"fsl,imx8qm";
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};
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ðphy0 {
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interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
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};
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/*
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* Apalis iMX8QM V1.0 has PHY KSZ9031. the Micrel PHY driver
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* doesn't support setting internal PHY delay for TXC line for
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* this PHY model. Use delay on MAC side instead.
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*/
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&fec1 {
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phy-mode = "rgmii-rxid";
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};
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/* TODO: Apalis HDMI1 */
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/* Apalis I2C2 (DDC) */
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lpi2c0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-frequency = <100000>;
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};
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&lsio_gpio0 {
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gpio-line-names = "MXM3_279",
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"MXM3_277",
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"MXM3_135",
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"MXM3_203",
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"MXM3_201",
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"MXM3_275",
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"MXM3_110",
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"MXM3_120",
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"MXM3_1/GPIO1",
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"MXM3_3/GPIO2",
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"MXM3_124",
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"MXM3_122",
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"MXM3_5/GPIO3",
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"MXM3_7/GPIO4",
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"",
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"",
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"MXM3_4",
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"MXM3_211",
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"MXM3_209",
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"MXM3_2",
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"MXM3_136",
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"MXM3_134",
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"MXM3_6",
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"MXM3_8",
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"MXM3_112",
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"MXM3_118",
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"MXM3_114",
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"MXM3_116";
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};
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&lsio_gpio1 {
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gpio-line-names = "",
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"",
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"",
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"",
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"MXM3_286",
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"",
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"MXM3_87",
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"MXM3_99",
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"MXM3_138",
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"MXM3_140",
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"MXM3_239",
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"",
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"MXM3_281",
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"MXM3_283",
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"MXM3_126",
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"MXM3_132",
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"",
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"",
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"",
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"",
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"MXM3_173",
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"MXM3_175",
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"MXM3_123";
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};
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&lsio_gpio2 {
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gpio-line-names = "",
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"",
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"",
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"",
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"",
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"",
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"",
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"MXM3_198",
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"MXM3_35",
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"MXM3_164",
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"",
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"",
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"",
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"",
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"MXM3_217",
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"MXM3_215",
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"",
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"",
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"MXM3_193",
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"MXM3_194",
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"MXM3_37",
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"",
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"MXM3_271",
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"MXM3_273",
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"MXM3_195",
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"MXM3_197",
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"MXM3_177",
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"MXM3_179",
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"MXM3_181",
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"MXM3_183",
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"MXM3_185",
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"MXM3_187";
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};
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&lsio_gpio3 {
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gpio-line-names = "MXM3_191",
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"",
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"MXM3_221",
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"MXM3_225",
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"MXM3_223",
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"MXM3_227",
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"MXM3_200",
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"MXM3_235",
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"MXM3_231",
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"MXM3_229",
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"MXM3_233",
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"MXM3_204",
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"MXM3_196",
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"",
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"MXM3_202",
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"",
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"",
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"",
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"MXM3_305",
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"MXM3_307",
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"MXM3_309",
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"MXM3_311",
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"MXM3_315",
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"MXM3_317",
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"MXM3_319",
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"MXM3_321",
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"MXM3_15/GPIO7",
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"MXM3_63",
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"MXM3_17/GPIO8",
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"MXM3_12",
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"MXM3_14",
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"MXM3_16";
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};
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&lsio_gpio4 {
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gpio-line-names = "MXM3_18",
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"MXM3_11/GPIO5",
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"MXM3_13/GPIO6",
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"MXM3_274",
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"MXM3_84",
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"MXM3_262",
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"MXM3_96",
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"",
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"",
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"",
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"",
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"",
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"MXM3_190",
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"",
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"",
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"",
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"MXM3_269",
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"MXM3_251",
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"MXM3_253",
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"MXM3_295",
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"MXM3_299",
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"MXM3_301",
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"MXM3_297",
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"MXM3_293",
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"MXM3_291",
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"MXM3_289",
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"MXM3_287";
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/* Enable pcie root / sata ref clock unconditionally */
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pcie-sata-hog {
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gpios = <27 GPIO_ACTIVE_HIGH>;
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};
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};
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&lsio_gpio5 {
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gpio-line-names = "",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"MXM3_150",
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"MXM3_160",
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"MXM3_162",
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"MXM3_144",
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"MXM3_146",
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"MXM3_148",
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"MXM3_152",
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"MXM3_156",
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"MXM3_158",
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"MXM3_159",
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"MXM3_184",
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"MXM3_180",
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"MXM3_186",
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"MXM3_188",
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"MXM3_176",
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"MXM3_178";
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};
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&lsio_gpio6 {
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gpio-line-names = "",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"",
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"MXM3_261",
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"MXM3_263",
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"MXM3_259",
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"MXM3_257",
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"MXM3_255",
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"MXM3_128",
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"MXM3_130",
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"MXM3_265",
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"MXM3_249",
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"MXM3_247",
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"MXM3_245",
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"MXM3_243";
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};
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&pinctrl_fec1 {
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fsl,pins =
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/* Use pads in 1.8V mode */
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<IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD 0x000014a0>,
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<IMX8QM_ENET0_MDC_CONN_ENET0_MDC 0x06000020>,
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<IMX8QM_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020>,
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<IMX8QM_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020>,
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<IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x06000020>,
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<IMX8QM_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x06000020>,
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<IMX8QM_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x06000020>,
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<IMX8QM_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x06000020>,
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<IMX8QM_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x06000020>,
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<IMX8QM_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x06000020>,
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<IMX8QM_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020>,
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<IMX8QM_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x06000020>,
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<IMX8QM_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x06000020>,
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<IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x06000020>,
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<IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020>,
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<IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M 0x06000020>,
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/* On-module ETH_RESET# */
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<IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 0x06000020>,
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/* On-module ETH_INT# */
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<IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05 0x04000060>;
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};
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&pinctrl_fec1_sleep {
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fsl,pins =
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<IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD 0x000014a0>,
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<IMX8QM_ENET0_MDC_LSIO_GPIO4_IO14 0x04000040>,
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<IMX8QM_ENET0_MDIO_LSIO_GPIO4_IO13 0x04000040>,
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<IMX8QM_ENET0_RGMII_TX_CTL_LSIO_GPIO5_IO31 0x04000040>,
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<IMX8QM_ENET0_RGMII_TXC_LSIO_GPIO5_IO30 0x04000040>,
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<IMX8QM_ENET0_RGMII_TXD0_LSIO_GPIO6_IO00 0x04000040>,
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<IMX8QM_ENET0_RGMII_TXD1_LSIO_GPIO6_IO01 0x04000040>,
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<IMX8QM_ENET0_RGMII_TXD2_LSIO_GPIO6_IO02 0x04000040>,
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<IMX8QM_ENET0_RGMII_TXD3_LSIO_GPIO6_IO03 0x04000040>,
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<IMX8QM_ENET0_RGMII_RXC_LSIO_GPIO6_IO04 0x04000040>,
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<IMX8QM_ENET0_RGMII_RX_CTL_LSIO_GPIO6_IO05 0x04000040>,
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<IMX8QM_ENET0_RGMII_RXD0_LSIO_GPIO6_IO06 0x04000040>,
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<IMX8QM_ENET0_RGMII_RXD1_LSIO_GPIO6_IO07 0x04000040>,
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<IMX8QM_ENET0_RGMII_RXD2_LSIO_GPIO6_IO08 0x04000040>,
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<IMX8QM_ENET0_RGMII_RXD3_LSIO_GPIO6_IO09 0x04000040>,
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<IMX8QM_ENET0_REFCLK_125M_25M_LSIO_GPIO4_IO15 0x04000040>,
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<IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 0x04000040>,
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<IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05 0x04000040>;
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};
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&iomuxc {
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/* Apalis I2C2 (DDC) */
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pinctrl_lpi2c0: lpi2c0grp {
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fsl,pins =
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<IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL 0x04000022>,
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<IMX8QM_HDMI_TX0_TS_SDA_DMA_I2C0_SDA 0x04000022>;
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};
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};
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/* On-module PCIe_CTRL0_CLKREQ */
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&pinctrl_pcie_sata_refclk {
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fsl,pins =
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<IMX8QM_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27 0x00000021>;
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};
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/* TODO: On-module Wi-Fi */
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/* Apalis MMC1 */
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&usdhc2 {
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/*
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* The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates
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* issues with certain SD cards, disable 1.8V signaling for now.
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*/
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no-1-8-v;
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};
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/* Apalis SD1 */
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&usdhc3 {
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/*
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* The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates
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* issues with certain SD cards, disable 1.8V signaling for now.
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*/
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no-1-8-v;
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};
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