490 lines
11 KiB
Plaintext
490 lines
11 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2023 PHYTEC Messtechnik GmbH
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*/
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/dts-v1/;
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#include <dt-bindings/input/linux-event-codes.h>
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#include <dt-bindings/leds/common.h>
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#include "imx8mm-phycore-som.dtsi"
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/ {
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model = "PHYTEC phyGATE-Tauri-L-iMX8MM";
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compatible = "phytec,imx8mm-phygate-tauri-l",
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"phytec,imx8mm-phycore-som", "fsl,imx8mm";
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chosen {
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stdout-path = &uart3;
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};
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can_osc_40m: clock-can {
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compatible = "fixed-clock";
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clock-frequency = <40000000>;
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clock-output-names = "can_osc_40m";
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#clock-cells = <0>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpiokeys>;
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key {
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gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
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label = "KEY-A";
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linux,code = <KEY_A>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_leds>;
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led-1 {
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color = <LED_COLOR_ID_RED>;
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gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "none";
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};
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led-2 {
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color = <LED_COLOR_ID_YELLOW>;
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gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "none";
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};
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};
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usdhc1_pwrseq: pwr-seq {
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compatible = "mmc-pwrseq-simple";
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post-power-on-delay-ms = <100>;
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power-off-delay-us = <60>;
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reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
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};
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reg_usb_hub_vbus: regulator-hub-otg1 {
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compatible = "regulator-fixed";
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gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbhubpwr>;
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regulator-name = "usb_hub_vbus";
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regulator-max-microvolt = <5000000>;
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regulator-min-microvolt = <5000000>;
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};
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reg_usb_otg1_vbus: regulator-usb-otg1 {
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compatible = "regulator-fixed";
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gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg1pwr>;
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regulator-name = "usb_otg1_vbus";
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regulator-max-microvolt = <5000000>;
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regulator-min-microvolt = <5000000>;
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};
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reg_usdhc2_vmmc: regulator-usdhc2 {
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compatible = "regulator-fixed";
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gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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off-on-delay-us = <20000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
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regulator-max-microvolt = <3300000>;
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regulator-min-microvolt = <3300000>;
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regulator-name = "VSD_3V3";
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};
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};
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&ecspi1 {
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cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>,
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<&gpio5 13 GPIO_ACTIVE_LOW>,
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<&gpio5 2 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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/* CAN MCP251XFD */
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can0: can@0 {
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compatible = "microchip,mcp251xfd";
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reg = <0>;
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clocks = <&can_osc_40m>;
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interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&gpio1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can_int>;
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spi-max-frequency = <10000000>;
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};
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tpm: tpm@1 {
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compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
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interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&gpio2>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_tpm>;
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reg = <1>;
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spi-max-frequency = <38000000>;
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};
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};
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&i2c2 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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pinctrl-1 = <&pinctrl_i2c2_gpio>;
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scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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temp_sense0: temperature-sensor@49 {
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compatible = "ti,tmp102";
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reg = <0x49>;
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interrupt-parent = <&gpio4>;
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interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_tempsense>;
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#thermal-sensor-cells = <1>;
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};
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};
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&i2c3 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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pinctrl-1 = <&pinctrl_i2c3_gpio>;
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scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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};
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&i2c4 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c4>;
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pinctrl-1 = <&pinctrl_i2c4_gpio>;
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scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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};
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/* PCIe */
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&pcie0 {
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assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
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<&clk IMX8MM_CLK_PCIE1_PHY>,
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<&clk IMX8MM_CLK_PCIE1_CTRL>;
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assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
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<&clk IMX8MM_SYS_PLL2_100M>,
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<&clk IMX8MM_SYS_PLL2_250M>;
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assigned-clock-rates = <10000000>, <100000000>, <250000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcie>;
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reset-gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&pwm1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm1>;
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status = "okay";
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};
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&pwm3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm3>;
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status = "okay";
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};
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&pwm4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm4>;
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status = "okay";
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};
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/* RTC */
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&rv3028 {
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trickle-resistor-ohms = <3000>;
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};
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&uart1 {
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assigned-clocks = <&clk IMX8MM_CLK_UART1>;
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assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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/* UART2 - RS232 */
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&uart2 {
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assigned-clocks = <&clk IMX8MM_CLK_UART2>;
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assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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/* UART - console */
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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status = "okay";
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};
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/* USB */
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&usbotg1 {
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adp-disable;
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dr_mode = "otg";
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over-current-active-low;
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samsung,picophy-pre-emp-curr-control = <3>;
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samsung,picophy-dc-vol-level-adjust = <7>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg1>;
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srp-disable;
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vbus-supply = <®_usb_otg1_vbus>;
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status = "okay";
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};
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&usbotg2 {
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disable-over-current;
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dr_mode = "host";
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samsung,picophy-pre-emp-curr-control = <3>;
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samsung,picophy-dc-vol-level-adjust = <7>;
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vbus-supply = <®_usb_hub_vbus>;
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status = "okay";
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};
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/* SD-Card */
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&usdhc2 {
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assigned-clocks = <&clk IMX8MM_CLK_USDHC2>;
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assigned-clock-rates = <200000000>;
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bus-width = <4>;
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cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
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disable-wp;
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
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pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
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vmmc-supply = <®_usdhc2_vmmc>;
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vqmmc-supply = <®_nvcc_sd2>;
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status = "okay";
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};
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&iomuxc {
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pinctrl_can_int: can-intgrp {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x00
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>;
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};
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82
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MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82
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MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82
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>;
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};
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pinctrl_ecspi1_cs: ecspi1csgrp {
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fsl,pins = <
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MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x00
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MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x00
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MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x00
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>;
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};
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pinctrl_gpiokeys: keygrp {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x00
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c2
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MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c2
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>;
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};
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pinctrl_i2c2_gpio: i2c2gpiogrp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17 0x1e0
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MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16 0x1e0
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c2
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MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c2
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>;
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};
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pinctrl_i2c3_gpio: i2c3gpiogrp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 0x1e0
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MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 0x1e0
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>;
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};
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pinctrl_i2c4: i2c4grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c2
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MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c2
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>;
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};
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pinctrl_i2c4_gpio: i2c4gpiogrp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0x1e0
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MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20 0x1e0
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>;
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};
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pinctrl_leds: leds1grp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI3_RXD_GPIO4_IO30 0x00
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MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x00
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_pcie: pciegrp {
|
||
|
|
fsl,pins = <
|
||
|
|
/* COEX2 */
|
||
|
|
MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x00
|
||
|
|
/* COEX1 */
|
||
|
|
MX8MM_IOMUXC_SAI1_TXD0_GPIO4_IO12 0x12
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_pwm1: pwm1grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_GPIO1_IO01_PWM1_OUT 0x40
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_pwm3: pwm3grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_SPDIF_TX_PWM3_OUT 0x40
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_pwm4: pwm4grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_GPIO1_IO15_PWM4_OUT 0x40
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x40
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_tempsense: tempsensegrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31 0x00
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_tpm: tpmgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11 0x140
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_uart1: uart1grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x00
|
||
|
|
MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x00
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_uart2: uart2grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x00
|
||
|
|
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x00
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_uart3: uart3grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
|
||
|
|
MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usbhubpwr: usbhubpwrgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x00
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usbotg1pwr: usbotg1pwrgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x00
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usbotg1: usbotg1grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x80
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc1: usdhc1grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x182
|
||
|
|
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0xc6
|
||
|
|
MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc6
|
||
|
|
MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc6
|
||
|
|
MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc6
|
||
|
|
MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc6
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x40
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc2: usdhc2grp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
|
||
|
|
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x192
|
||
|
|
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d2
|
||
|
|
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d2
|
||
|
|
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d2
|
||
|
|
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d2
|
||
|
|
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d2
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc2_100mhz: usdhc2100mhzgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
|
||
|
|
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
|
||
|
|
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
|
||
|
|
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
|
||
|
|
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
|
||
|
|
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
|
||
|
|
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pinctrl_usdhc2_200mhz: usdhc2200mhzgrp {
|
||
|
|
fsl,pins = <
|
||
|
|
MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
|
||
|
|
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
|
||
|
|
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
|
||
|
|
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|