294 lines
5.0 KiB
Plaintext
294 lines
5.0 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/* Copyright (c) 2021, Marcel Ziswiler <marcel@ziswiler.com> */
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/dts-v1/;
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#include "armada-385.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Netgear GS110EMX";
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compatible = "netgear,gs110emx", "marvell,armada380";
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aliases {
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/* So that mvebu u-boot can update the MAC addresses */
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ethernet1 = ð0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&front_button_pins>;
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pinctrl-names = "default";
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key-factory-default {
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label = "Factory Default";
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gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x08000000>; /* 128 MB */
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
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MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
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MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
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MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
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MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
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internal-regs {
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rtc@a3800 {
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/*
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* If the rtc doesn't work, run "date reset"
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* twice in u-boot.
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*/
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status = "okay";
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};
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};
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};
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};
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ð0 {
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/* ethernet@70000 */
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bm,pool-long = <0>;
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bm,pool-short = <1>;
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buffer-manager = <&bm>;
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phy-mode = "rgmii-id";
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pinctrl-0 = <&ge0_rgmii_pins>;
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pinctrl-names = "default";
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status = "okay";
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fixed-link {
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full-duplex;
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pause;
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speed = <1000>;
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};
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};
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&mdio {
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pinctrl-names = "default";
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pinctrl-0 = <&mdio_pins>;
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status = "okay";
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ethernet-switch@0 {
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compatible = "marvell,mv88e6190";
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#interrupt-cells = <2>;
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interrupt-controller;
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interrupt-parent = <&gpio1>;
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interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-0 = <&switch_interrupt_pins>;
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pinctrl-names = "default";
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reg = <0>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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switch0phy1: ethernet-phy@1 {
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reg = <0x1>;
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};
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switch0phy2: ethernet-phy@2 {
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reg = <0x2>;
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};
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switch0phy3: ethernet-phy@3 {
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reg = <0x3>;
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};
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switch0phy4: ethernet-phy@4 {
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reg = <0x4>;
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};
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switch0phy5: ethernet-phy@5 {
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reg = <0x5>;
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};
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switch0phy6: ethernet-phy@6 {
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reg = <0x6>;
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};
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switch0phy7: ethernet-phy@7 {
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reg = <0x7>;
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};
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switch0phy8: ethernet-phy@8 {
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reg = <0x8>;
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};
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};
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mdio-external {
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compatible = "marvell,mv88e6xxx-mdio-external";
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#address-cells = <1>;
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#size-cells = <0>;
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phy1: ethernet-phy@b {
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reg = <0xb>;
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compatible = "ethernet-phy-ieee802.3-c45";
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};
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phy2: ethernet-phy@c {
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reg = <0xc>;
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compatible = "ethernet-phy-ieee802.3-c45";
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};
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};
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet-port@0 {
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ethernet = <ð0>;
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phy-mode = "rgmii";
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reg = <0>;
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fixed-link {
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full-duplex;
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pause;
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speed = <1000>;
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};
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};
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ethernet-port@1 {
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label = "lan1";
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phy-handle = <&switch0phy1>;
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reg = <1>;
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};
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ethernet-port@2 {
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label = "lan2";
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phy-handle = <&switch0phy2>;
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reg = <2>;
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};
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ethernet-port@3 {
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label = "lan3";
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phy-handle = <&switch0phy3>;
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reg = <3>;
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};
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ethernet-port@4 {
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label = "lan4";
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phy-handle = <&switch0phy4>;
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reg = <4>;
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};
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ethernet-port@5 {
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label = "lan5";
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phy-handle = <&switch0phy5>;
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reg = <5>;
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};
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ethernet-port@6 {
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label = "lan6";
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phy-handle = <&switch0phy6>;
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reg = <6>;
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};
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ethernet-port@7 {
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label = "lan7";
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phy-handle = <&switch0phy7>;
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reg = <7>;
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};
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ethernet-port@8 {
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label = "lan8";
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phy-handle = <&switch0phy8>;
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reg = <8>;
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};
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ethernet-port@9 {
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/* 88X3310P external phy */
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label = "lan9";
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phy-handle = <&phy1>;
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phy-mode = "xaui";
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reg = <9>;
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};
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ethernet-port@a {
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/* 88X3310P external phy */
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label = "lan10";
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phy-handle = <&phy2>;
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phy-mode = "xaui";
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reg = <0xa>;
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};
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};
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};
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};
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&pinctrl {
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front_button_pins: front-button-pins {
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marvell,pins = "mpp38";
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marvell,function = "gpio";
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};
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switch_interrupt_pins: switch-interrupt-pins {
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marvell,pins = "mpp39";
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marvell,function = "gpio";
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};
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};
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&spi0 {
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pinctrl-0 = <&spi0_pins>;
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pinctrl-names = "default";
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status = "okay";
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0>; /* Chip select 0 */
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spi-max-frequency = <3000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "boot";
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read-only;
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reg = <0x00000000 0x00100000>;
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};
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partition@100000 {
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label = "env";
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reg = <0x00100000 0x00010000>;
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};
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partition@200000 {
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label = "rsv";
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reg = <0x00110000 0x00010000>;
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};
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partition@300000 {
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label = "image0";
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reg = <0x00120000 0x00900000>;
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};
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partition@400000 {
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label = "config";
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reg = <0x00a20000 0x00300000>;
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};
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partition@480000 {
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label = "debug";
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reg = <0x00d20000 0x002e0000>;
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};
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};
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};
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};
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&uart0 {
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pinctrl-0 = <&uart0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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