540 lines
12 KiB
C
540 lines
12 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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#include <sys/mman.h>
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#include <inttypes.h>
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#include <asm/bug.h>
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#include <errno.h>
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#include <string.h>
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#include <linux/ring_buffer.h>
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#include <linux/perf_event.h>
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#include <perf/mmap.h>
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#include <perf/event.h>
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#include <perf/evsel.h>
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#include <internal/mmap.h>
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#include <internal/lib.h>
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#include <linux/kernel.h>
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#include <linux/math64.h>
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#include <linux/stringify.h>
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#include "internal.h"
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void perf_mmap__init(struct perf_mmap *map, struct perf_mmap *prev,
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bool overwrite, libperf_unmap_cb_t unmap_cb)
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{
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/* Assume fields were zero initialized. */
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map->fd = -1;
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map->overwrite = overwrite;
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map->unmap_cb = unmap_cb;
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refcount_set(&map->refcnt, 0);
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if (prev)
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prev->next = map;
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}
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size_t perf_mmap__mmap_len(struct perf_mmap *map)
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{
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return map->mask + 1 + page_size;
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}
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int perf_mmap__mmap(struct perf_mmap *map, struct perf_mmap_param *mp,
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int fd, struct perf_cpu cpu)
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{
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map->prev = 0;
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map->mask = mp->mask;
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map->base = mmap(NULL, perf_mmap__mmap_len(map), mp->prot,
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MAP_SHARED, fd, 0);
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if (map->base == MAP_FAILED) {
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map->base = NULL;
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return -1;
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}
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map->fd = fd;
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map->cpu = cpu;
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return 0;
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}
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void perf_mmap__munmap(struct perf_mmap *map)
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{
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if (!map)
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return;
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zfree(&map->event_copy);
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map->event_copy_sz = 0;
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if (map->base) {
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munmap(map->base, perf_mmap__mmap_len(map));
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map->base = NULL;
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map->fd = -1;
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refcount_set(&map->refcnt, 0);
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}
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if (map->unmap_cb)
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map->unmap_cb(map);
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}
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void perf_mmap__get(struct perf_mmap *map)
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{
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refcount_inc(&map->refcnt);
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}
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void perf_mmap__put(struct perf_mmap *map)
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{
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BUG_ON(map->base && refcount_read(&map->refcnt) == 0);
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if (refcount_dec_and_test(&map->refcnt))
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perf_mmap__munmap(map);
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}
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static inline void perf_mmap__write_tail(struct perf_mmap *md, u64 tail)
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{
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ring_buffer_write_tail(md->base, tail);
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}
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u64 perf_mmap__read_head(struct perf_mmap *map)
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{
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return ring_buffer_read_head(map->base);
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}
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static bool perf_mmap__empty(struct perf_mmap *map)
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{
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struct perf_event_mmap_page *pc = map->base;
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return perf_mmap__read_head(map) == map->prev && !pc->aux_size;
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}
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void perf_mmap__consume(struct perf_mmap *map)
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{
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if (!map->overwrite) {
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u64 old = map->prev;
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perf_mmap__write_tail(map, old);
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}
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if (refcount_read(&map->refcnt) == 1 && perf_mmap__empty(map))
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perf_mmap__put(map);
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}
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static int overwrite_rb_find_range(void *buf, int mask, u64 *start, u64 *end)
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{
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struct perf_event_header *pheader;
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u64 evt_head = *start;
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int size = mask + 1;
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pr_debug2("%s: buf=%p, start=%"PRIx64"\n", __func__, buf, *start);
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pheader = (struct perf_event_header *)(buf + (*start & mask));
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while (true) {
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if (evt_head - *start >= (unsigned int)size) {
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pr_debug("Finished reading overwrite ring buffer: rewind\n");
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if (evt_head - *start > (unsigned int)size)
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evt_head -= pheader->size;
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*end = evt_head;
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return 0;
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}
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pheader = (struct perf_event_header *)(buf + (evt_head & mask));
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if (pheader->size == 0) {
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pr_debug("Finished reading overwrite ring buffer: get start\n");
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*end = evt_head;
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return 0;
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}
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evt_head += pheader->size;
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pr_debug3("move evt_head: %"PRIx64"\n", evt_head);
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}
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WARN_ONCE(1, "Shouldn't get here\n");
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return -1;
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}
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/*
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* Report the start and end of the available data in ringbuffer
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*/
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static int __perf_mmap__read_init(struct perf_mmap *md)
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{
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u64 head = perf_mmap__read_head(md);
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u64 old = md->prev;
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unsigned char *data = md->base + page_size;
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unsigned long size;
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md->start = md->overwrite ? head : old;
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md->end = md->overwrite ? old : head;
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if ((md->end - md->start) < md->flush)
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return -EAGAIN;
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size = md->end - md->start;
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if (size > (unsigned long)(md->mask) + 1) {
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if (!md->overwrite) {
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WARN_ONCE(1, "failed to keep up with mmap data. (warn only once)\n");
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md->prev = head;
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perf_mmap__consume(md);
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return -EAGAIN;
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}
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/*
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* Backward ring buffer is full. We still have a chance to read
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* most of data from it.
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*/
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if (overwrite_rb_find_range(data, md->mask, &md->start, &md->end))
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return -EINVAL;
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}
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return 0;
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}
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int perf_mmap__read_init(struct perf_mmap *map)
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{
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/*
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* Check if event was unmapped due to a POLLHUP/POLLERR.
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*/
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if (!refcount_read(&map->refcnt))
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return -ENOENT;
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return __perf_mmap__read_init(map);
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}
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/*
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* Mandatory for overwrite mode
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* The direction of overwrite mode is backward.
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* The last perf_mmap__read() will set tail to map->core.prev.
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* Need to correct the map->core.prev to head which is the end of next read.
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*/
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void perf_mmap__read_done(struct perf_mmap *map)
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{
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/*
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* Check if event was unmapped due to a POLLHUP/POLLERR.
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*/
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if (!refcount_read(&map->refcnt))
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return;
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map->prev = perf_mmap__read_head(map);
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}
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/* When check_messup is true, 'end' must points to a good entry */
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static union perf_event *perf_mmap__read(struct perf_mmap *map,
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u64 *startp, u64 end)
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{
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unsigned char *data = map->base + page_size;
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union perf_event *event = NULL;
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int diff = end - *startp;
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if (diff >= (int)sizeof(event->header)) {
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size_t size;
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event = (union perf_event *)&data[*startp & map->mask];
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size = event->header.size;
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if (size < sizeof(event->header) || diff < (int)size)
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return NULL;
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/*
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* Event straddles the mmap boundary -- header should always
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* be inside due to u64 alignment of output.
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*/
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if ((*startp & map->mask) + size != ((*startp + size) & map->mask)) {
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unsigned int offset = *startp;
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unsigned int len = size, cpy;
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void *dst = map->event_copy;
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if (size > map->event_copy_sz) {
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dst = realloc(map->event_copy, size);
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if (!dst)
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return NULL;
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map->event_copy = dst;
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map->event_copy_sz = size;
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}
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do {
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cpy = min(map->mask + 1 - (offset & map->mask), len);
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memcpy(dst, &data[offset & map->mask], cpy);
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offset += cpy;
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dst += cpy;
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len -= cpy;
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} while (len);
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event = (union perf_event *)map->event_copy;
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}
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*startp += size;
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}
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return event;
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}
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/*
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* Read event from ring buffer one by one.
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* Return one event for each call.
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*
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* Usage:
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* perf_mmap__read_init()
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* while(event = perf_mmap__read_event()) {
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* //process the event
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* perf_mmap__consume()
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* }
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* perf_mmap__read_done()
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*/
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union perf_event *perf_mmap__read_event(struct perf_mmap *map)
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{
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union perf_event *event;
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/*
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* Check if event was unmapped due to a POLLHUP/POLLERR.
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*/
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if (!refcount_read(&map->refcnt))
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return NULL;
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/* non-overwirte doesn't pause the ringbuffer */
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if (!map->overwrite)
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map->end = perf_mmap__read_head(map);
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event = perf_mmap__read(map, &map->start, map->end);
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if (!map->overwrite)
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map->prev = map->start;
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return event;
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}
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#if defined(__i386__) || defined(__x86_64__)
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static u64 read_perf_counter(unsigned int counter)
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{
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unsigned int low, high;
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asm volatile("rdpmc" : "=a" (low), "=d" (high) : "c" (counter));
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return low | ((u64)high) << 32;
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}
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static u64 read_timestamp(void)
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{
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unsigned int low, high;
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asm volatile("rdtsc" : "=a" (low), "=d" (high));
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return low | ((u64)high) << 32;
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}
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#elif defined(__aarch64__)
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#define read_sysreg(r) ({ \
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u64 __val; \
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asm volatile("mrs %0, " __stringify(r) : "=r" (__val)); \
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__val; \
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})
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static u64 read_pmccntr(void)
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{
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return read_sysreg(pmccntr_el0);
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}
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#define PMEVCNTR_READ(idx) \
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static u64 read_pmevcntr_##idx(void) { \
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return read_sysreg(pmevcntr##idx##_el0); \
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}
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PMEVCNTR_READ(0);
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PMEVCNTR_READ(1);
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PMEVCNTR_READ(2);
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PMEVCNTR_READ(3);
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PMEVCNTR_READ(4);
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PMEVCNTR_READ(5);
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PMEVCNTR_READ(6);
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PMEVCNTR_READ(7);
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PMEVCNTR_READ(8);
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PMEVCNTR_READ(9);
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PMEVCNTR_READ(10);
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PMEVCNTR_READ(11);
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PMEVCNTR_READ(12);
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PMEVCNTR_READ(13);
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PMEVCNTR_READ(14);
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PMEVCNTR_READ(15);
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PMEVCNTR_READ(16);
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PMEVCNTR_READ(17);
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PMEVCNTR_READ(18);
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PMEVCNTR_READ(19);
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PMEVCNTR_READ(20);
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PMEVCNTR_READ(21);
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PMEVCNTR_READ(22);
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PMEVCNTR_READ(23);
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PMEVCNTR_READ(24);
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PMEVCNTR_READ(25);
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PMEVCNTR_READ(26);
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PMEVCNTR_READ(27);
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PMEVCNTR_READ(28);
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PMEVCNTR_READ(29);
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PMEVCNTR_READ(30);
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/*
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* Read a value direct from PMEVCNTR<idx>
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*/
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static u64 read_perf_counter(unsigned int counter)
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{
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static u64 (* const read_f[])(void) = {
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read_pmevcntr_0,
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read_pmevcntr_1,
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read_pmevcntr_2,
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read_pmevcntr_3,
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read_pmevcntr_4,
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read_pmevcntr_5,
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read_pmevcntr_6,
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read_pmevcntr_7,
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read_pmevcntr_8,
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read_pmevcntr_9,
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read_pmevcntr_10,
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read_pmevcntr_11,
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read_pmevcntr_13,
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read_pmevcntr_12,
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read_pmevcntr_14,
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read_pmevcntr_15,
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|
read_pmevcntr_16,
|
||
|
|
read_pmevcntr_17,
|
||
|
|
read_pmevcntr_18,
|
||
|
|
read_pmevcntr_19,
|
||
|
|
read_pmevcntr_20,
|
||
|
|
read_pmevcntr_21,
|
||
|
|
read_pmevcntr_22,
|
||
|
|
read_pmevcntr_23,
|
||
|
|
read_pmevcntr_24,
|
||
|
|
read_pmevcntr_25,
|
||
|
|
read_pmevcntr_26,
|
||
|
|
read_pmevcntr_27,
|
||
|
|
read_pmevcntr_28,
|
||
|
|
read_pmevcntr_29,
|
||
|
|
read_pmevcntr_30,
|
||
|
|
read_pmccntr
|
||
|
|
};
|
||
|
|
|
||
|
|
if (counter < ARRAY_SIZE(read_f))
|
||
|
|
return (read_f[counter])();
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static u64 read_timestamp(void) { return read_sysreg(cntvct_el0); }
|
||
|
|
|
||
|
|
/* __riscv_xlen contains the witdh of the native base integer, here 64-bit */
|
||
|
|
#elif defined(__riscv) && __riscv_xlen == 64
|
||
|
|
|
||
|
|
/* TODO: implement rv32 support */
|
||
|
|
|
||
|
|
#define CSR_CYCLE 0xc00
|
||
|
|
#define CSR_TIME 0xc01
|
||
|
|
|
||
|
|
#define csr_read(csr) \
|
||
|
|
({ \
|
||
|
|
register unsigned long __v; \
|
||
|
|
__asm__ __volatile__ ("csrr %0, %1" \
|
||
|
|
: "=r" (__v) \
|
||
|
|
: "i" (csr) : ); \
|
||
|
|
__v; \
|
||
|
|
})
|
||
|
|
|
||
|
|
static unsigned long csr_read_num(int csr_num)
|
||
|
|
{
|
||
|
|
#define switchcase_csr_read(__csr_num, __val) {\
|
||
|
|
case __csr_num: \
|
||
|
|
__val = csr_read(__csr_num); \
|
||
|
|
break; }
|
||
|
|
#define switchcase_csr_read_2(__csr_num, __val) {\
|
||
|
|
switchcase_csr_read(__csr_num + 0, __val) \
|
||
|
|
switchcase_csr_read(__csr_num + 1, __val)}
|
||
|
|
#define switchcase_csr_read_4(__csr_num, __val) {\
|
||
|
|
switchcase_csr_read_2(__csr_num + 0, __val) \
|
||
|
|
switchcase_csr_read_2(__csr_num + 2, __val)}
|
||
|
|
#define switchcase_csr_read_8(__csr_num, __val) {\
|
||
|
|
switchcase_csr_read_4(__csr_num + 0, __val) \
|
||
|
|
switchcase_csr_read_4(__csr_num + 4, __val)}
|
||
|
|
#define switchcase_csr_read_16(__csr_num, __val) {\
|
||
|
|
switchcase_csr_read_8(__csr_num + 0, __val) \
|
||
|
|
switchcase_csr_read_8(__csr_num + 8, __val)}
|
||
|
|
#define switchcase_csr_read_32(__csr_num, __val) {\
|
||
|
|
switchcase_csr_read_16(__csr_num + 0, __val) \
|
||
|
|
switchcase_csr_read_16(__csr_num + 16, __val)}
|
||
|
|
|
||
|
|
unsigned long ret = 0;
|
||
|
|
|
||
|
|
switch (csr_num) {
|
||
|
|
switchcase_csr_read_32(CSR_CYCLE, ret)
|
||
|
|
default:
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
#undef switchcase_csr_read_32
|
||
|
|
#undef switchcase_csr_read_16
|
||
|
|
#undef switchcase_csr_read_8
|
||
|
|
#undef switchcase_csr_read_4
|
||
|
|
#undef switchcase_csr_read_2
|
||
|
|
#undef switchcase_csr_read
|
||
|
|
}
|
||
|
|
|
||
|
|
static u64 read_perf_counter(unsigned int counter)
|
||
|
|
{
|
||
|
|
return csr_read_num(CSR_CYCLE + counter);
|
||
|
|
}
|
||
|
|
|
||
|
|
static u64 read_timestamp(void)
|
||
|
|
{
|
||
|
|
return csr_read_num(CSR_TIME);
|
||
|
|
}
|
||
|
|
|
||
|
|
#else
|
||
|
|
static u64 read_perf_counter(unsigned int counter __maybe_unused) { return 0; }
|
||
|
|
static u64 read_timestamp(void) { return 0; }
|
||
|
|
#endif
|
||
|
|
|
||
|
|
int perf_mmap__read_self(struct perf_mmap *map, struct perf_counts_values *count)
|
||
|
|
{
|
||
|
|
struct perf_event_mmap_page *pc = map->base;
|
||
|
|
u32 seq, idx, time_mult = 0, time_shift = 0;
|
||
|
|
u64 cnt, cyc = 0, time_offset = 0, time_cycles = 0, time_mask = ~0ULL;
|
||
|
|
|
||
|
|
if (!pc || !pc->cap_user_rdpmc)
|
||
|
|
return -1;
|
||
|
|
|
||
|
|
do {
|
||
|
|
seq = READ_ONCE(pc->lock);
|
||
|
|
barrier();
|
||
|
|
|
||
|
|
count->ena = READ_ONCE(pc->time_enabled);
|
||
|
|
count->run = READ_ONCE(pc->time_running);
|
||
|
|
|
||
|
|
if (pc->cap_user_time && count->ena != count->run) {
|
||
|
|
cyc = read_timestamp();
|
||
|
|
time_mult = READ_ONCE(pc->time_mult);
|
||
|
|
time_shift = READ_ONCE(pc->time_shift);
|
||
|
|
time_offset = READ_ONCE(pc->time_offset);
|
||
|
|
|
||
|
|
if (pc->cap_user_time_short) {
|
||
|
|
time_cycles = READ_ONCE(pc->time_cycles);
|
||
|
|
time_mask = READ_ONCE(pc->time_mask);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
idx = READ_ONCE(pc->index);
|
||
|
|
cnt = READ_ONCE(pc->offset);
|
||
|
|
if (pc->cap_user_rdpmc && idx) {
|
||
|
|
s64 evcnt = read_perf_counter(idx - 1);
|
||
|
|
u16 width = READ_ONCE(pc->pmc_width);
|
||
|
|
|
||
|
|
evcnt <<= 64 - width;
|
||
|
|
evcnt >>= 64 - width;
|
||
|
|
cnt += evcnt;
|
||
|
|
} else
|
||
|
|
return -1;
|
||
|
|
|
||
|
|
barrier();
|
||
|
|
} while (READ_ONCE(pc->lock) != seq);
|
||
|
|
|
||
|
|
if (count->ena != count->run) {
|
||
|
|
u64 delta;
|
||
|
|
|
||
|
|
/* Adjust for cap_usr_time_short, a nop if not */
|
||
|
|
cyc = time_cycles + ((cyc - time_cycles) & time_mask);
|
||
|
|
|
||
|
|
delta = time_offset + mul_u64_u32_shr(cyc, time_mult, time_shift);
|
||
|
|
|
||
|
|
count->ena += delta;
|
||
|
|
if (idx)
|
||
|
|
count->run += delta;
|
||
|
|
}
|
||
|
|
|
||
|
|
count->val = cnt;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|