419 lines
11 KiB
C
419 lines
11 KiB
C
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// SPDX-License-Identifier: GPL-2.0+
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/* Copyright (c) 2017 NXP. */
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#include <linux/bitfield.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/phy/phy.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#define PHY_CTRL0 0x0
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#define PHY_CTRL0_REF_SSP_EN BIT(2)
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#define PHY_CTRL0_FSEL_MASK GENMASK(10, 5)
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#define PHY_CTRL0_FSEL_24M 0x2a
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#define PHY_CTRL1 0x4
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#define PHY_CTRL1_RESET BIT(0)
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#define PHY_CTRL1_COMMONONN BIT(1)
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#define PHY_CTRL1_ATERESET BIT(3)
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#define PHY_CTRL1_VDATSRCENB0 BIT(19)
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#define PHY_CTRL1_VDATDETENB0 BIT(20)
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#define PHY_CTRL2 0x8
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#define PHY_CTRL2_TXENABLEN0 BIT(8)
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#define PHY_CTRL2_OTG_DISABLE BIT(9)
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#define PHY_CTRL3 0xc
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#define PHY_CTRL3_COMPDISTUNE_MASK GENMASK(2, 0)
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#define PHY_CTRL3_TXPREEMP_TUNE_MASK GENMASK(16, 15)
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#define PHY_CTRL3_TXRISE_TUNE_MASK GENMASK(21, 20)
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#define PHY_CTRL3_TXVREF_TUNE_MASK GENMASK(25, 22)
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#define PHY_CTRL3_TX_VBOOST_LEVEL_MASK GENMASK(31, 29)
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#define PHY_CTRL4 0x10
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#define PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_MASK GENMASK(20, 15)
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#define PHY_CTRL5 0x14
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#define PHY_CTRL5_DMPWD_OVERRIDE_SEL BIT(23)
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#define PHY_CTRL5_DMPWD_OVERRIDE BIT(22)
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#define PHY_CTRL5_DPPWD_OVERRIDE_SEL BIT(21)
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#define PHY_CTRL5_DPPWD_OVERRIDE BIT(20)
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#define PHY_CTRL5_PCS_TX_SWING_FULL_MASK GENMASK(6, 0)
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#define PHY_CTRL6 0x18
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#define PHY_CTRL6_ALT_CLK_EN BIT(1)
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#define PHY_CTRL6_ALT_CLK_SEL BIT(0)
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#define PHY_TUNE_DEFAULT 0xffffffff
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struct imx8mq_usb_phy {
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struct phy *phy;
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struct clk *clk;
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void __iomem *base;
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struct regulator *vbus;
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u32 pcs_tx_swing_full;
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u32 pcs_tx_deemph_3p5db;
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u32 tx_vref_tune;
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u32 tx_rise_tune;
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u32 tx_preemp_amp_tune;
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u32 tx_vboost_level;
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u32 comp_dis_tune;
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};
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static u32 phy_tx_vref_tune_from_property(u32 percent)
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{
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percent = clamp(percent, 94U, 124U);
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return DIV_ROUND_CLOSEST(percent - 94U, 2);
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}
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static u32 phy_tx_rise_tune_from_property(u32 percent)
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{
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switch (percent) {
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case 0 ... 98:
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return 3;
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case 99:
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return 2;
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case 100 ... 101:
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return 1;
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default:
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return 0;
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}
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}
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static u32 phy_tx_preemp_amp_tune_from_property(u32 microamp)
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{
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microamp = min(microamp, 1800U);
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return microamp / 600;
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}
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static u32 phy_tx_vboost_level_from_property(u32 microvolt)
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{
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switch (microvolt) {
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case 0 ... 960:
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return 0;
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case 961 ... 1160:
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return 2;
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default:
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return 3;
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}
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}
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static u32 phy_pcs_tx_deemph_3p5db_from_property(u32 decibel)
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{
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return min(decibel, 36U);
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}
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static u32 phy_comp_dis_tune_from_property(u32 percent)
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{
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switch (percent) {
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case 0 ... 92:
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return 0;
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case 93 ... 95:
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return 1;
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case 96 ... 97:
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return 2;
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case 98 ... 102:
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return 3;
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case 103 ... 105:
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return 4;
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case 106 ... 109:
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return 5;
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case 110 ... 113:
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return 6;
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default:
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return 7;
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}
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}
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static u32 phy_pcs_tx_swing_full_from_property(u32 percent)
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{
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percent = min(percent, 100U);
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return (percent * 127) / 100;
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}
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static void imx8m_get_phy_tuning_data(struct imx8mq_usb_phy *imx_phy)
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{
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struct device *dev = imx_phy->phy->dev.parent;
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if (device_property_read_u32(dev, "fsl,phy-tx-vref-tune-percent",
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&imx_phy->tx_vref_tune))
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imx_phy->tx_vref_tune = PHY_TUNE_DEFAULT;
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else
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imx_phy->tx_vref_tune =
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phy_tx_vref_tune_from_property(imx_phy->tx_vref_tune);
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if (device_property_read_u32(dev, "fsl,phy-tx-rise-tune-percent",
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&imx_phy->tx_rise_tune))
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imx_phy->tx_rise_tune = PHY_TUNE_DEFAULT;
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else
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imx_phy->tx_rise_tune =
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phy_tx_rise_tune_from_property(imx_phy->tx_rise_tune);
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if (device_property_read_u32(dev, "fsl,phy-tx-preemp-amp-tune-microamp",
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&imx_phy->tx_preemp_amp_tune))
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imx_phy->tx_preemp_amp_tune = PHY_TUNE_DEFAULT;
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else
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imx_phy->tx_preemp_amp_tune =
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phy_tx_preemp_amp_tune_from_property(imx_phy->tx_preemp_amp_tune);
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if (device_property_read_u32(dev, "fsl,phy-tx-vboost-level-microvolt",
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&imx_phy->tx_vboost_level))
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imx_phy->tx_vboost_level = PHY_TUNE_DEFAULT;
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else
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imx_phy->tx_vboost_level =
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phy_tx_vboost_level_from_property(imx_phy->tx_vboost_level);
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if (device_property_read_u32(dev, "fsl,phy-comp-dis-tune-percent",
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&imx_phy->comp_dis_tune))
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imx_phy->comp_dis_tune = PHY_TUNE_DEFAULT;
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else
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imx_phy->comp_dis_tune =
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phy_comp_dis_tune_from_property(imx_phy->comp_dis_tune);
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if (device_property_read_u32(dev, "fsl,pcs-tx-deemph-3p5db-attenuation-db",
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&imx_phy->pcs_tx_deemph_3p5db))
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imx_phy->pcs_tx_deemph_3p5db = PHY_TUNE_DEFAULT;
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else
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imx_phy->pcs_tx_deemph_3p5db =
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phy_pcs_tx_deemph_3p5db_from_property(imx_phy->pcs_tx_deemph_3p5db);
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if (device_property_read_u32(dev, "fsl,phy-pcs-tx-swing-full-percent",
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&imx_phy->pcs_tx_swing_full))
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imx_phy->pcs_tx_swing_full = PHY_TUNE_DEFAULT;
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else
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imx_phy->pcs_tx_swing_full =
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phy_pcs_tx_swing_full_from_property(imx_phy->pcs_tx_swing_full);
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}
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static void imx8m_phy_tune(struct imx8mq_usb_phy *imx_phy)
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{
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u32 value;
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/* PHY tuning */
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if (imx_phy->pcs_tx_deemph_3p5db != PHY_TUNE_DEFAULT) {
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value = readl(imx_phy->base + PHY_CTRL4);
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value &= ~PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_MASK;
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value |= FIELD_PREP(PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_MASK,
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imx_phy->pcs_tx_deemph_3p5db);
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writel(value, imx_phy->base + PHY_CTRL4);
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}
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if (imx_phy->pcs_tx_swing_full != PHY_TUNE_DEFAULT) {
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value = readl(imx_phy->base + PHY_CTRL5);
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value |= FIELD_PREP(PHY_CTRL5_PCS_TX_SWING_FULL_MASK,
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imx_phy->pcs_tx_swing_full);
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writel(value, imx_phy->base + PHY_CTRL5);
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}
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if ((imx_phy->tx_vref_tune & imx_phy->tx_rise_tune &
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imx_phy->tx_preemp_amp_tune & imx_phy->comp_dis_tune &
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imx_phy->tx_vboost_level) == PHY_TUNE_DEFAULT)
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/* If all are the default values, no need update. */
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return;
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value = readl(imx_phy->base + PHY_CTRL3);
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if (imx_phy->tx_vref_tune != PHY_TUNE_DEFAULT) {
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value &= ~PHY_CTRL3_TXVREF_TUNE_MASK;
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value |= FIELD_PREP(PHY_CTRL3_TXVREF_TUNE_MASK,
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imx_phy->tx_vref_tune);
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}
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if (imx_phy->tx_rise_tune != PHY_TUNE_DEFAULT) {
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value &= ~PHY_CTRL3_TXRISE_TUNE_MASK;
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value |= FIELD_PREP(PHY_CTRL3_TXRISE_TUNE_MASK,
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imx_phy->tx_rise_tune);
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}
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if (imx_phy->tx_preemp_amp_tune != PHY_TUNE_DEFAULT) {
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value &= ~PHY_CTRL3_TXPREEMP_TUNE_MASK;
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value |= FIELD_PREP(PHY_CTRL3_TXPREEMP_TUNE_MASK,
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imx_phy->tx_preemp_amp_tune);
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}
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if (imx_phy->comp_dis_tune != PHY_TUNE_DEFAULT) {
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value &= ~PHY_CTRL3_COMPDISTUNE_MASK;
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value |= FIELD_PREP(PHY_CTRL3_COMPDISTUNE_MASK,
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imx_phy->comp_dis_tune);
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}
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if (imx_phy->tx_vboost_level != PHY_TUNE_DEFAULT) {
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value &= ~PHY_CTRL3_TX_VBOOST_LEVEL_MASK;
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value |= FIELD_PREP(PHY_CTRL3_TX_VBOOST_LEVEL_MASK,
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imx_phy->tx_vboost_level);
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}
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writel(value, imx_phy->base + PHY_CTRL3);
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}
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static int imx8mq_usb_phy_init(struct phy *phy)
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{
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struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
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u32 value;
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value = readl(imx_phy->base + PHY_CTRL1);
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value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0 |
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PHY_CTRL1_COMMONONN);
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value |= PHY_CTRL1_RESET | PHY_CTRL1_ATERESET;
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writel(value, imx_phy->base + PHY_CTRL1);
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value = readl(imx_phy->base + PHY_CTRL0);
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value |= PHY_CTRL0_REF_SSP_EN;
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writel(value, imx_phy->base + PHY_CTRL0);
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value = readl(imx_phy->base + PHY_CTRL2);
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value |= PHY_CTRL2_TXENABLEN0;
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writel(value, imx_phy->base + PHY_CTRL2);
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value = readl(imx_phy->base + PHY_CTRL1);
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value &= ~(PHY_CTRL1_RESET | PHY_CTRL1_ATERESET);
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writel(value, imx_phy->base + PHY_CTRL1);
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return 0;
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}
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static int imx8mp_usb_phy_init(struct phy *phy)
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{
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struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
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u32 value;
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/* USB3.0 PHY signal fsel for 24M ref */
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value = readl(imx_phy->base + PHY_CTRL0);
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value &= ~PHY_CTRL0_FSEL_MASK;
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value |= FIELD_PREP(PHY_CTRL0_FSEL_MASK, PHY_CTRL0_FSEL_24M);
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writel(value, imx_phy->base + PHY_CTRL0);
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/* Disable alt_clk_en and use internal MPLL clocks */
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value = readl(imx_phy->base + PHY_CTRL6);
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value &= ~(PHY_CTRL6_ALT_CLK_SEL | PHY_CTRL6_ALT_CLK_EN);
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writel(value, imx_phy->base + PHY_CTRL6);
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value = readl(imx_phy->base + PHY_CTRL1);
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value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0);
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value |= PHY_CTRL1_RESET | PHY_CTRL1_ATERESET;
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writel(value, imx_phy->base + PHY_CTRL1);
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value = readl(imx_phy->base + PHY_CTRL0);
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value |= PHY_CTRL0_REF_SSP_EN;
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writel(value, imx_phy->base + PHY_CTRL0);
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value = readl(imx_phy->base + PHY_CTRL2);
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value |= PHY_CTRL2_TXENABLEN0 | PHY_CTRL2_OTG_DISABLE;
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writel(value, imx_phy->base + PHY_CTRL2);
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udelay(10);
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value = readl(imx_phy->base + PHY_CTRL1);
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value &= ~(PHY_CTRL1_RESET | PHY_CTRL1_ATERESET);
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writel(value, imx_phy->base + PHY_CTRL1);
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imx8m_phy_tune(imx_phy);
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return 0;
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}
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static int imx8mq_phy_power_on(struct phy *phy)
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{
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struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
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int ret;
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ret = regulator_enable(imx_phy->vbus);
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if (ret)
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return ret;
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return clk_prepare_enable(imx_phy->clk);
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}
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||
|
|
static int imx8mq_phy_power_off(struct phy *phy)
|
||
|
|
{
|
||
|
|
struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
|
||
|
|
|
||
|
|
clk_disable_unprepare(imx_phy->clk);
|
||
|
|
regulator_disable(imx_phy->vbus);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct phy_ops imx8mq_usb_phy_ops = {
|
||
|
|
.init = imx8mq_usb_phy_init,
|
||
|
|
.power_on = imx8mq_phy_power_on,
|
||
|
|
.power_off = imx8mq_phy_power_off,
|
||
|
|
.owner = THIS_MODULE,
|
||
|
|
};
|
||
|
|
|
||
|
|
static const struct phy_ops imx8mp_usb_phy_ops = {
|
||
|
|
.init = imx8mp_usb_phy_init,
|
||
|
|
.power_on = imx8mq_phy_power_on,
|
||
|
|
.power_off = imx8mq_phy_power_off,
|
||
|
|
.owner = THIS_MODULE,
|
||
|
|
};
|
||
|
|
|
||
|
|
static const struct of_device_id imx8mq_usb_phy_of_match[] = {
|
||
|
|
{.compatible = "fsl,imx8mq-usb-phy",
|
||
|
|
.data = &imx8mq_usb_phy_ops,},
|
||
|
|
{.compatible = "fsl,imx8mp-usb-phy",
|
||
|
|
.data = &imx8mp_usb_phy_ops,},
|
||
|
|
{ }
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(of, imx8mq_usb_phy_of_match);
|
||
|
|
|
||
|
|
static int imx8mq_usb_phy_probe(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
struct phy_provider *phy_provider;
|
||
|
|
struct device *dev = &pdev->dev;
|
||
|
|
struct imx8mq_usb_phy *imx_phy;
|
||
|
|
const struct phy_ops *phy_ops;
|
||
|
|
|
||
|
|
imx_phy = devm_kzalloc(dev, sizeof(*imx_phy), GFP_KERNEL);
|
||
|
|
if (!imx_phy)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
imx_phy->clk = devm_clk_get(dev, "phy");
|
||
|
|
if (IS_ERR(imx_phy->clk)) {
|
||
|
|
dev_err(dev, "failed to get imx8mq usb phy clock\n");
|
||
|
|
return PTR_ERR(imx_phy->clk);
|
||
|
|
}
|
||
|
|
|
||
|
|
imx_phy->base = devm_platform_ioremap_resource(pdev, 0);
|
||
|
|
if (IS_ERR(imx_phy->base))
|
||
|
|
return PTR_ERR(imx_phy->base);
|
||
|
|
|
||
|
|
phy_ops = of_device_get_match_data(dev);
|
||
|
|
if (!phy_ops)
|
||
|
|
return -EINVAL;
|
||
|
|
|
||
|
|
imx_phy->phy = devm_phy_create(dev, NULL, phy_ops);
|
||
|
|
if (IS_ERR(imx_phy->phy))
|
||
|
|
return PTR_ERR(imx_phy->phy);
|
||
|
|
|
||
|
|
imx_phy->vbus = devm_regulator_get(dev, "vbus");
|
||
|
|
if (IS_ERR(imx_phy->vbus))
|
||
|
|
return dev_err_probe(dev, PTR_ERR(imx_phy->vbus), "failed to get vbus\n");
|
||
|
|
|
||
|
|
phy_set_drvdata(imx_phy->phy, imx_phy);
|
||
|
|
|
||
|
|
imx8m_get_phy_tuning_data(imx_phy);
|
||
|
|
|
||
|
|
phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
|
||
|
|
|
||
|
|
return PTR_ERR_OR_ZERO(phy_provider);
|
||
|
|
}
|
||
|
|
|
||
|
|
static struct platform_driver imx8mq_usb_phy_driver = {
|
||
|
|
.probe = imx8mq_usb_phy_probe,
|
||
|
|
.driver = {
|
||
|
|
.name = "imx8mq-usb-phy",
|
||
|
|
.of_match_table = imx8mq_usb_phy_of_match,
|
||
|
|
}
|
||
|
|
};
|
||
|
|
module_platform_driver(imx8mq_usb_phy_driver);
|
||
|
|
|
||
|
|
MODULE_DESCRIPTION("FSL IMX8MQ USB PHY driver");
|
||
|
|
MODULE_LICENSE("GPL");
|