57 lines
1.2 KiB
C
57 lines
1.2 KiB
C
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2023 Loongson Technology Corporation Limited
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*/
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#include "lsdc_drv.h"
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#include "lsdc_probe.h"
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/*
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* Processor ID (implementation) values for bits 15:8 of the PRID register.
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*/
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#define LOONGSON_CPU_IMP_MASK 0xff00
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#define LOONGSON_CPU_IMP_SHIFT 8
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#define LOONGARCH_CPU_IMP_LS2K1000 0xa0
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#define LOONGARCH_CPU_IMP_LS2K2000 0xb0
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#define LOONGARCH_CPU_IMP_LS3A5000 0xc0
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#define LOONGSON_CPU_MIPS_IMP_LS2K 0x61 /* Loongson 2K Mips series SoC */
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/*
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* Particular Revision values for bits 7:0 of the PRID register.
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*/
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#define LOONGSON_CPU_REV_MASK 0x00ff
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#define LOONGARCH_CPUCFG_PRID_REG 0x0
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/*
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* We can achieve fine-grained control with the information about the host.
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*/
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unsigned int loongson_cpu_get_prid(u8 *imp, u8 *rev)
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{
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unsigned int prid = 0;
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#if defined(__loongarch__)
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__asm__ volatile("cpucfg %0, %1\n\t"
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: "=&r"(prid)
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: "r"(LOONGARCH_CPUCFG_PRID_REG)
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);
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#endif
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#if defined(__mips__)
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__asm__ volatile("mfc0\t%0, $15\n\t"
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: "=r" (prid)
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);
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#endif
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if (imp)
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*imp = (prid & LOONGSON_CPU_IMP_MASK) >> LOONGSON_CPU_IMP_SHIFT;
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if (rev)
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*rev = prid & LOONGSON_CPU_REV_MASK;
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return prid;
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}
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