73 lines
1.5 KiB
YAML
73 lines
1.5 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm LPASS Core Clock Controller on SC7280
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maintainers:
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- Taniya Das <quic_tdas@quicinc.com>
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description: |
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Qualcomm LPASS core clock control module provides the clocks and power
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domains on SC7280.
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See also:: include/dt-bindings/clock/qcom,lpass-sc7280.h
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properties:
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compatible:
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enum:
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- qcom,sc7280-lpasscc
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clocks:
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items:
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- description: gcc_cfg_noc_lpass_clk from GCC
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clock-names:
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items:
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- const: iface
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'#clock-cells':
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const: 1
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reg:
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items:
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- description: LPASS qdsp6ss register
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- description: LPASS top-cc register
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reg-names:
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items:
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- const: qdsp6ss
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- const: top_cc
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qcom,adsp-pil-mode:
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description:
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Indicates if the LPASS would be brought out of reset using
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remoteproc peripheral loader.
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type: boolean
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- '#clock-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-sc7280.h>
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#include <dt-bindings/clock/qcom,lpass-sc7280.h>
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clock-controller@3000000 {
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compatible = "qcom,sc7280-lpasscc";
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reg = <0x03000000 0x40>, <0x03c04000 0x4>;
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reg-names = "qdsp6ss", "top_cc";
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clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>;
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clock-names = "iface";
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qcom,adsp-pil-mode;
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#clock-cells = <1>;
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};
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...
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